TWL6040A2GZQZR集成電路（IC）的編解碼器規(guī)格書PDF中文資料

1.1 Features 1

? Four Audio Digital-to-Analog Converter (DAC) ? Dual Phase-Locked Loops (PLLs) for Flexible

Channels Clock Support:

? Stereo Capless Headphone Drivers: – 32-kHz Sleep Clock Input for System Low-

– Up to 104-dB DR Power Playback Mode

– Power Tune for Performance and Power – 12-, 19.2-, 26-, and 38.4-MHz System Clock

Consumption Tradeoff Input

? Stereo 8 Ω, 1.5 W per Channel Speaker Drivers ? Accessory Plug and Unplug Detection, Accessory

? Differential Earpiece Driver Button Press Detection

? Stereo Line-Out ? Integrated Power Supplies:

? Two Audio Analog-to-Digital Converter (ADC) – Negative Charge Pump for Capless Headphone

Channels: Driver

– 96-dBA SNR – Two Low Dropout Voltage Regulators (LDOs)

? Four Audio Inputs: for High Power Supply Rejection Ratio (PSRR)

– Three Differential Microphone Inputs ? I2C Control

– Stereo Line-In and FM Input ? Thermal Protection:

? Two Vibrator and Haptics Feedback Channels: – Host Interrupt

– Differential H-Bridge Drivers ? Power Supplies:

? Two Low-Noise Analog Microphone Bias Outputs – Analog: 2.1 V

? Two Digital Microphone Bias Outputs – Digital I/O: 1.8 V

? Analog Low-Power Loop from Line-in to – Battery: 2.3 to 5.5 V

Headphone and Speaker Outputs ? Package 6-mm × 6-mm 120-Pin PBGA