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UPB1003GS中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

UPB1003GS
廠商型號

UPB1003GS

功能描述

REFERENCE FREQUENCY 16.368 MHz, 2ND IF FREQUENCY 4.092 MHz RF/IF FREQUENCY DOWN-CONVERTER PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER

文件大小

164.47 Kbytes

頁面數(shù)量

9

生產(chǎn)廠商 Renesas Electronics America
企業(yè)簡稱

NEC瑞薩

中文名稱

日本瑞薩電子株式會社官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-23 23:00:00

UPB1003GS規(guī)格書詳情

DESCRIPTION

The μPB1005GS is a silicon monolithic integrated circuit for GPS receiver. This IC is designed as double

conversion RF block integrated RF/IF down-converter + PLL frequency synthesizer on 1 chip.

The μPB1005GS features shrink package, fixed prescaler and supply voltage. The 30-pin plastic SSOP package is suitable for high density surface mounting. The fixed division internal prescaler is needless to input serial counter data. Supply voltage is 3 V. Thus, the μPB1005GS can make RF block fewer components and lower power consumption.

FEATURES

? Double conversion : fREFin= 16.368 MHz, f2ndIFout= 4.092 MHz

? Integrated RF block : RF/IF frequency down-converter + PLL frequency synthesizer

? High-density surface mountable : 30-pin plastic SSOP (9.85 ×6.1 ×2.0 mm)

? Needless to input counter data : fixed division internal prescaler

? VCO side division : ÷200 (÷25, ÷8 serial prescaler)

? Reference division : ÷2

? Supply voltage : VCC= 2.7 to 3.3 V

? Low current consumption : ICC= 45.0 mA TYP.@VCC= 3.0 V

? Gain adjustable externally : Gain control voltage pin (control voltage up vs. gain down)

APPLICATION

? Consumer use GPS receiver of reference frequency 16.368 MHz, 2nd IF frequency 4.092 MHz

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