UPD16732N中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

FEATURES

? 384 Outputs

? Capable of outputting 64 values by means of 5-by-2 external power modules (10 units) and a D/A converter

? Output dynamic range : VSS2+0.1 V to VDD2-0.1 V

? Logic part power supply voltage (VDD1) : 3.3 ± 0.3 V

? Driver part power supply voltage (VDD2 ): 8.5 ± 0.5 V

? CMOS level input

? Input of 6 bits (gradation data) by 6 dots

? High-speed data transfer: fMAX. = 40 MHz (internal data transfer speed when operating at 3.0 V)

? Apply for dot-line inversion, n-line inversion and column line inversion

? Single bank arrangement is possible (loaded with slim or bending TCP) (POL)

? Display data inversion function (POL2)