UPD30550中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
UPD30550規(guī)格書(shū)詳情
DESCRIPTION
The μPD30550 (VR5500) is a member of the VRSeries? of RISC (Reduced Instruction Set Computer) microprocessors. It is a high-performance 64-/32-bit microprocessor that employs the RISC architecture developed by MIPS?.
The VR5500 allowsselection of a 64-bit or 32-bit bus width for the system interface, and can operate using protocols compatible with the VR5000 Series? and VR5432?
. FEATURES
? MIPS 64-bit RISC architecture
? High-speed operation processing
? Two-waysuperscaler super pipeline
? 300 MHz product: 603 MIPS
400 MHz product: 804 MIPS
? High-speed translation lookaside buffer (TLB) (48 entries)
?Address space
? Physical: 36 bits (64-bit bus selected) 32 bits (32-bit bus selected)
? Virtual: 40 bits (in 64-bit mode) 31 bits (in 32-bit mode)
? On-chip floating-point unit (FPU)
? Supports sum-of-products instructions
? On-chip primarycache memory (instruction/data: 32 KB each)
? 2-wayset associative
? Supports line lock feature
產(chǎn)品屬性
- 型號(hào)：
UPD30550
- 功能描述：
VR5500(TM) User＇s Manual(Preliminary) | User＇s Manual[08/2002]
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
RENESAS(瑞薩)/IDT |
23+ |
7350 |
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!! |
詢(xún)價(jià) | |||
NEC |
23+ |
NA/ |
3524 |
原廠直銷(xiāo),現(xiàn)貨供應(yīng),賬期支持! |
詢(xún)價(jià) | ||
NEC |
24+ |
BGA |
35210 |
一級(jí)代理/放心采購(gòu) |
詢(xún)價(jià) | ||
NEC |
23+ |
BGA |
20000 |
原廠原裝正品現(xiàn)貨 |
詢(xún)價(jià) | ||
NEC |
23+ |
BGA |
478 |
原裝正品現(xiàn)貨 |
詢(xún)價(jià) | ||
NEC |
BGA272 |
396379 |
集團(tuán)化配單-有更多數(shù)量-免費(fèi)送樣-原包裝正品現(xiàn)貨-正規(guī) |
詢(xún)價(jià) | |||
RENESAS/瑞薩 |
23+ |
NA |
25630 |
原裝正品 |
詢(xún)價(jià) | ||
NEC |
22+23+ |
BGA |
37104 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢(xún)價(jià) | ||
NEC |
589220 |
16余年資質(zhì) 絕對(duì)原盒原盤(pán) 更多數(shù)量 |
詢(xún)價(jià) | ||||
RENESAS/瑞薩 |
21+ |
NA |
12820 |
只做原裝,質(zhì)量保證 |
詢(xún)價(jià) |
