UPD703015A中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

DESCRIPTION

The μPD703014A, 703014AY, 703015A, 703015AY, 703017A, and 703017AY (V850/SA1) are 32-/16-bit single-chip microcontrollers that include the CPU core of the V850 FamilyTM, and peripheral functions such as ROM/RAM, timer/counters, serial interfaces, an A/D converter, a timer, and a DMA controller.

FEATURES

● Number of instructions: 74

● Minimum instruction execution time:

59 ns (@ 17 MHz operation with main system clock (fXX))

50 ns (@ 20 MHz operation with main system clock (fXX))

30.5 μs (@ 32.768 kHz operation with subsystem clock (fXT))

● General-purpose registers: 32 bits × 32 registers

● Instruction set:

Signed multiplication, saturation operations, 32-bit shift instructions, bit manipulation instructions, load/store instructions

● Memory space:

16 MB linear address space Memory block allocation function: 2 MB per block

● External bus interface: 16-bit data bus Address bus: Separate output enabled

● Internal memory

Mask ROM: 64 KB (μPD703014A, 703014AY) 128 KB (μPD703015A, 703015AY) 256 KB (μPD703017A, 703017AY)

RAM: 4 KB (μPD703014A, 703014AY, 703015A, 703015AY) 8 KB (μPD703017A, 703017AY)

● Interrupts and exception External: 8, internal: 23, exception: 1

● I/O lines Total: 85

● Timer/counters 16-bit timer: 2 channels 8-bit timer: 4 channels

● Watch timer: 1 channel

● Watchdog timer: 1 channel

● Serial interface (SIO) Asynchronous serial interface (UART) Clocked serial interface (CSI) I2C bus interface (μPD703014AY, 703015AY, 703017AY)

● A/D converter: 12 channels

● DMA controller: 3 channels

● RTP: 8 bits × 1 channel or 4 bits × 2 channels

● Power-saving functions: HALT/IDLE/STOP modes

● Packages: 100-pin plastic LQFP (14 × 14) 121-pin plastic FBGA (12 × 12)