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UPD72850AGK-9EU中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書

UPD72850AGK-9EU
廠商型號(hào)

UPD72850AGK-9EU

功能描述

IEEE1394 400Mbps PHY

文件大小

290.84 Kbytes

頁面數(shù)量

48

生產(chǎn)廠商 Renesas Electronics America
企業(yè)簡(jiǎn)稱

NEC瑞薩

中文名稱

日本瑞薩電子株式會(huì)社官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-5 23:00:00

UPD72850AGK-9EU規(guī)格書詳情

The μPD72850A is the 3-port physical layer LSI which complies with the P1394a draft 2.0 specifications.

The μPD72850A works up to 400 Mbps. It is an upgrade of NECs μPD72850.

FEATURES

? The Three-port Physical Layer LSI complies to IEEE P1394a draft 2.0

? Connection debounce

? Arbitration enhancements

? Arbitrated short bus reset

? Ack-accelerated arbitration

? Fly-by concatenation

? Multiple-speed packet concatenation

? Arbitration enhancements and cycle start (controlled by the Link layer)

? Performance optimization via PHY pinging

? Priority arbitration (controlled by the Link layer)

? Data rate: 393.216 / 196.608 / 98.304 Mbps

? Compliant with Suspend/Resume function as defined in P1394a draft 2.1

? 3.3 V single power supply

? Electrical isolated Link interface

? 24.576 MHz crystal clock generation, 393.216 MHz PLL multiplying frequency

? System power management by signaling of node power class information

? Cable power monitor (CPS) is equipped

? Fully interoperable with IEEE1394 std 1394 Link (FireWireTM, i.LINKTM)

? Cable bias and terminal voltage driver supply function (for 3-port each)

? Separate digital power and analog GND

? Enable/Disable port control switch when power supply is powered on

? Support Suspend/Resume Off mode (Compliant with P1394a draft 1.3)

? Number of supported port are selectable

? 1port, 2port, 3port. This selection is only under Suspend/Resume Off mode

? Compliant with MD8405E (FUJIFILM MICRODEVICES CO., LTD)

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