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UPD72872中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

UPD72872
廠商型號

UPD72872

功能描述

MOS INTEGRATED CIRCUIT

文件大小

389.39 Kbytes

頁面數(shù)量

42

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-22 11:19:00

UPD72872規(guī)格書詳情

FEATURES

? Shrink from the μPD72870A.

? Compliant with Link Layer Services as defined in 1394 Open Host Controller Interface specification release 1.0

? Compliant with Physical Layer Services as defined in P1394a draft 2.0 (Data Rate 100/200/400 Mbps)

? Numbers of supported port (1, 2 ports) are selectable

? Compliant with protocol enhancement as defined in P1394a draft 2.0

? Modular 32-bit host interface compliant to PCI local bus specification Revision 2.2

? Support PCI-Bus Power Management Interface Specification release 1.1

? Modular 32-bit host interface compliant to Card Bus Specification

? Cycle Master and Isochronous Resource Manager capable

? 32-bit CRC generation and checking for receive/transmit packets

? 4 isochronous transmit DMAs and 4 isochronous receive DMAs supported

? 32-bit DMA channels for physical memory read/write

? Clock generation by 24.576 MHz X’tal

? Internal control and operational registers direct-mapped to PCI configuration space

? 2-wire Serial EEPROMTM interface supported

? Separate power supply Link and PHY

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NEC
2002
LQFP
898
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NEC
23+
TQFP
3000
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NEC
1948+
QFP
6852
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ST
原廠原封
396379
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NEC
21+
QFP
13880
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NEC
24+
QFP
5000
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NEC
24+
TQFP-120
6
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NEC
23+24
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9860
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NEC
22+
LQFP
8200
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NEC
21+
TQFP100
6000
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