UPD75036中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

FEATURES

? Variable instruction execution time advantageous to high-speed operation and power-saving:

? 0.95 ms, 1.91 ms, or 15.3 ms (at 4.19 MHz when the main system selected)

? 122 ms (at 32.768 kHz when the subsystem clock selected)

? Program memory (ROM) capacity: 16256 ′ 8 bits

? Data memory (RAM) capacity: 1024 ′ 4 bits

? Built-in A/D converter (8-bit resolution, successive approximation): 8 channels

? Powerful timer function: 4 channels

? Usable for 16-bit integral A/D conversion and PWM output

? Built-in NEC standard serial bus interface (SBI)

? Very low-power clock operation allowed (5 mA TYP. at 3 V)