UPD75064中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

FEATURES

? Variable instruction execution time advantageous to high-speed operation and power-saving:

? 0.95 ms, 1.91 ms, or 15.3 ms (at 4.19 MHz with the main system clock selected)

? 122 ms (at 32.768 kHz with the subsystem clock selected)

? A/D converter (8-bit resolution, successive approximation): 8 channels

? Capable of low-voltage operation: VDD = 2.7 to 6.0 V

? Timer function: 3 channels

? On-chip NEC standard serial bus interface (SBI)

? Very low-power watch operation enabled (5 mA TYP. at 3 V)

? Pull-up resistor option allowed for 27 I/O lines

? The mPD75P068 and 75P068(A) (PROM versions) available: Capable of low-voltage operation (VDD = 2.7 to 6.0 V)