UT62256CLS-35LL中文資料ETC數(shù)據(jù)手冊PDF規(guī)格書

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GENERAL DESCRIPTION

The UT62256C is a 262,144-bit low power CMOS static random access memory organized as 32,768 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology.

The UT62256C is designed for high-speed and low power application. It is particularly well suited for battery back-up nonvolatile memory application.

The UT62256C operates from a single 5V power supply and all inputs and outputs are fully TTL compatible.

FEATURES

■ Access time : 35/70ns (max.)

■ Low power consumption:

Operating : 40/30 mA (typical.)

Standby : 3mA (typical) normal

2uA (typical) L-version

1uA (typical) LL-version

■ Single 5V power supply

■ All inputs and outputs are TTL compatible

■ Fully static operation

■ Three state outputs

■ Data retention voltage : 2V (min.)

■ Package : 28-pin 600 mil PDIP

28-pin 330 mil SOP

28-pin 8mmx13.4mm STSOP