V103A集成電路（IC）的驅動器接收器收發(fā)器規(guī)格書PDF中文資料

Features

? Pin compatible with THine THC63LVD103

? Wide pixel clock range: 8 - 135 MHz

? Guaranteed operation over -20 to +85° C ambient

temperature

? Supports a wide range of video and graphics modes

including VGA, SVGA, XGA, SXGA, SXGA+, NTSC,

PAL, SDTV, and HDTV up to 1080I or 720P

? Internal PLL requires no external loop filter

? Selectable rising or falling clock edge for data

alignment

? Compatible with Spread Spectrum clock source

? Reduced LVDS output voltage swing mode

(selectable) to minimize EMI

? CMOS/TTL data inputs can be configured for

reduced input voltage swing

? Single 3.3 V supply

? Low power consumption CMOS design

? Power down mode

? 64-pin TQFP lead free package