V53C16256中文資料茂矽電子數(shù)據(jù)手冊PDF規(guī)格書

Description

The V53C16256H is a 262,144 x 16 bit high-performance CMOS dynamic random access memory. The V53C16256H offers Fast Page mode with dual CAS inputs. An address, CAS and RAS input capacitances are reduced to one quarter when the x4 DRAM is used to construct the same memory density. The V53C16256H has symmetric address and accepts 512 cycle 8ms interval.

All inputs are TTL compatible. Fast Page Mode operation allows random access up to 512 x 16 bits, within a page, with cycle times as short as 19ns.

The V53C16256H is best suited for graphics, and DSP applications.

Features

■ 256K x 16-bit organization

■ Fast Page Mode for a sustained data rate

of 53 MHz.

■ RAS access time: 30, 35, 40, 45, 50, 60 ns

■ Dual CAS Inputs

■ Low power dissipation

■ Read-Modify-Write, RAS-Only Refresh,

CAS-Before-RAS Refresh

■ Refresh Interval: 512 cycles/8 ms

■ Available in 40-pin 400 mil SOJ and

40/44L-pin 400 mil TSOP-II packages

■ Single +5V ±10 Power Supply

■ TTL Interface