VSC8113中文資料VITESSE數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

General Description

The VSC8113 is an ATM/SONET/SDH compatible transceiver integrating an on-chip Clock Multiplication Unit (PLL) for the high speed clock as well as a clock and data recovery unit (CRU) with 8 bit serial-to-parallel and parallel-to-serial data conversion. The PLL clock is used for serialization in the transmit direction (Mux).

Features

? Loss of Signal (LOS) Input & LOS Detection

? +3.3V/5V programmable PECL Serial Interface

? Provides Equipment, Facilities and Split Loopback Modes as well as Loop Timing Mode

? Provide TTL & PECL reference clock inputs

? Meets Bellcore, ITU and ANSI Specifications for

Jitter Performance

? Low Power - 1.0 Watts Typical

? 100 PQFP Package

? Operates at Either STS-3/STM-1 (155.52Mb/s)

or STS-12/STM-4 (622.08Mb/s) Data Rates

? Compatible with Industry ATM UNI Devices

? On Chip Clock Generation of the 155.52MHz

or 622.08MHz High Speed Clock (Mux)

? On Chip Clock Recovery of the 155.52MHz or

622.08MHz High Speed Clock (Demux)

? 8 Bit Parallel TTL Interface

? SONET/SDH Frame Recovery

? Lock Detect for both CRU and CMU