W9816G6CB-7中文資料華邦電子數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

W9816G6CB is a high-speed synchronous dynamic random access memory (SDRAM), organized as 512K words × 2 banks × 16 bits. Using pipelined architecture and 0.13 μm process technology, Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time.

FEATURES

? 2.7V~3.6V power supply for -7 speed grade

? 3.3V ± 0.3V power supply for -6 speed grade

? 524,288 words x 2 banks x 16 bits organization

? Self Refresh current: standard and low power

? CAS Latency: 2 and 3

? Burst Length: 1, 2, 4, 8, and full page

? Burst Read, Single Write Mode

? Byte data controlled by UDQM and LDQM

? Auto-precharge and controlled precharge

? 4K refresh cycles/64 mS

? Interface: LVTTL

? Package: VFBGA 60 balls pitch=0.65mm, using Pb free with RoHS compliant