WF2M16-XXX5中文資料美高森美數(shù)據(jù)手冊PDF規(guī)格書

FEATURES

? Access Times of 90, 120, 150ns

? Packaging:

? 56 lead, Hermetic Ceramic, 0.520 CSOP (Package 207).

Fits standard 56 SSOP footprint.

? 44 pin Ceramic SOJ (Package 102)**

? 44 lead Ceramic Flatpack (Package 208)**

? Sector Architecture

? 32 equal size sectors of 64KBytes each

? Any combination of sectors can be erased. Also supports

full chip erase.

? Minimum 100,000 Write/Erase Cycles Minimum

? Organized as 2Mx16; User Confi gurable as 2 x 2Mx8

? Commercial, Industrial, and Military Temperature Ranges

? 5 Volt Read and Write. 5V ± 10% Supply.

? Low Power CMOS

? Data# Polling and Toggle Bit feature for detection of

program or erase cycle completion.

? Supports reading or programming data to a sector not being

erased.

? Built-in Decoupling Caps and Multiple Ground Pins for Low

Noise Operation.

? RESET# pin resets internal state machine to the read

mode.

? Ready/Busy (RY#/BY#) output for detection of program or

erase cycle completion.

? Multiple Ground Pins for Low Noise Operation