X25642P-2.7中文資料Xicor數(shù)據(jù)手冊(cè)PDF規(guī)格書

DESCRIPTION

The X25642 is a CMOS 65,536-bit serial E2PROM, internally organized as 8K x 8. The X25642 features a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple three-wire bus. The bus signals are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a chip select (CS) input, allowing any number of devices to share the same bus.

FEATURES

? 2MHz Clock Rate

? Low Power CMOS

—<1μA Standby Current

—<5mA Active Current

? 2.7V To 5.5V Power Supply

? SPI Modes (0,0 & 1,1)

? 8K X 8 Bits

—32 Byte Page Mode

? Block Lock Protection

—Protect 1/4, 1/2 or all of E2PROM Array

? Built-in Inadvertent Write Protection

—Power-Up/Down protection circuitry

—Write Enable Latch

—Write Protect Pin

? Self-Timed Write Cycle

—5ms Write Cycle Time (Typical)

? High Reliability

—Endurance: 100,000 cycles

—Data Retention: 100 Years

—ESD protection: 2000V on all pins

? Packages

—8-Lead PDIP

—8-Lead SOIC

—14-Lead SOIC

—20-Lead TSSOP