X25C02SM中文資料Xicor數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The X25C02 is a CMOS 2048-bit serial E2PROM, internally organized as 256 x 8. The X25C02 features a serial interface and software protocol allowing operation on a simple three-wire bus. The bus signals are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a chip select (CS) input, allowing any number of devices to share the same bus.

The X25C02 also features two additional inputs that provide the end user with added flexibility. By asserting the HOLD input, the X25C02 will ignore transitions on its inputs, thus allowing the host to service higher priority interrupts. The WP input can be used as a hardwire input to the X25C02 disabling all write attempts, thus providing a mechanism for limiting end user capability of altering the memory.

The X25C02 utilizes Xicor’s proprietary Direct Write? cell, providing a minimum endurance of 100,000 cycles per byte and a minimum data retention of 100 years.

FEATURES

? 1MHz Clock Rate

? 256 X 8 Bits

—4 Byte Page Mode

? Low Power CMOS

—150μA Standby Current

—2mA Active Current

? 5V Power Supply

? Built-in Inadvertent Write Protection

—Power-Up/Power-Down protection circuitry

—Write Latch

—Write Protect Pin

? Self-Timed Write Cycle

—5ms Write Cycle Time (Typical)

? High Reliability

—Endurance: 100,000 cycles per byte

—Data Retention: 100 Years

—ESD protection: 2000V on all pins

? Available Packages

—8-Lead MSOP

—8-Lead PDlP

—8-Lead SOIC