Z80382集成電路（IC）的微處理器規(guī)格書PDF中文資料

Z80382屬于集成電路（IC）的微處理器。由Zilog, Inc.制造生產(chǎn)的Z80382微處理器微處理器產(chǎn)品是用于信息和數(shù)據(jù)處理的集成電路。與主要按照制造商所選術(shù)語而視為微控制器的類似產(chǎn)品相比，這些器件有所不同。但是按照傳統(tǒng)，微處理器不會在設(shè)備內(nèi)集成工作存儲器，不太可能集成混合信號外設(shè)，并且可能在更為復(fù)雜的軟件范式下使用，這些范式涉及使用操作系統(tǒng)來管理多任務(wù)同時執(zhí)行。

GENERAL DESCRIPTION

The Z80382 (Z382) is designed to address high-end data communication applications such as digital modems (ISDN, GSM, Mobitex & Modacom), xDSL and analog modems (V.34 and beyond). The Z382 provides a performance upgrade to existing Z80- and Z18x-based designs by utilizing the increased bandwidth of the 380C processor. The Z8L382 is a low voltage version of the device.

FEATURES

■ Embedded Z380a Microprocessor

- Maintains Object Code Compatibility with Z80¨

and Z180a Microprocessors

- Enhanced Instruction Set for 16-Bit Operation

- 16 MB Linear Addressing

- Two Clock Cycle Instruction Execution Minimum

- Four On-Chip Register Banks

- BC/DE/HL/IX/IY Augmented to 32 Bits

- Clock Divide-by-Two and Multiply-by-Two Options

- Fully Static CMOS Design with Low-Power

Standby Mode

- 16-Bit Internal Bus

- Dynamic Bus Sizing (8/16-Bit Inter-Operability)

■ 16550 Mimic with I/O Mailbox, DMA Mailbox, and 16 mA

Bus Drive

■ Three HDLC Synchronous Serial Channels

- Serial Data Rate of up to 10 Mbps

■ GCI/SCIT Bus Interface

■ Eight Advanced DMA Channels with 24-Bit Addressing

■ Plug-and-Play ISA Interface

■ PCMCIA Interface

■ Two Enhanced ASCIs (UARTs) with 16-Bit Baud Rate

Generators (BRG)

■ Clocked Serial I/O Channel (CSIO) for Use with Serial

Memory

■ Two 16-Bit Timers with Flexible Prescalers

■ Three Memory Chip Selects with Wait-State Generators

■ Watch-Dog Timer (WDT)

■ Up to 32 General-Purpose I/O Pins

■ DC to 20 MHz Operating Frequency @ 5.0V

■ DC to 10 MHz Operating Frequency @ 3.3V

■ 144-Pin QFP and VQFP Style Packages