ZSP200中文資料LSI數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
| 廠商型號(hào) |
ZSP200 |
| 功能描述 | Highly Efficient Quad-MAC DSP Core |
| 文件大小 |
63.36 Kbytes |
| 頁(yè)面數(shù)量 |
2 頁(yè) |
| 生產(chǎn)廠商 | LSI Computer Systems |
| 企業(yè)簡(jiǎn)稱 |
LSI |
| 中文名稱 | LSI Computer Systems官網(wǎng) |
| 原廠標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-5-4 9:30:00 |
| 人工找貨 | ZSP200價(jià)格和庫(kù)存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
ZSP200規(guī)格書(shū)詳情
OVERVIEW
The ZSP540 processor core is a high-performance/power-efficient QuadMAC/Six-ALU implementation of the ZSP?G2 architecture. The ZSP540 utilizes a 16-bit architecture with extensive 32-bit capabilities and sets an unmatched balance of performance/power/size and memory utilization efficiency. The Z.Turbo feature provides the SOC designer with the option to extend the ZSP540 Instruction Set and the ability to add application-specific acceleration logic.
CORE FEATURES
? Quad-MAC/Six-ALU DSP core
? 4+1 instructions per cycle
? Up to 350MHz, 8-stage pipeline design
? Up to 1750 million instructions/sec
? Dual 64-bit wide Load/Store data ports
? Z.Turbo coprocessor extensions capable
? 24-bit address space
? HW managed instructions scheduling
? HW/SW controlled power management
? Real-time trace and profiling capability
? Full AMBA/AHB support (optional)
? JTAG debug interface
? Static, single phase clocked design
? Compatible with all other ZSP cores
ARCHITECTURE FEATURES
? Embedded control processing efficiency
? 32-bit addressing capabilities
? 16 and 32-bit standard instruction set
? Extensive 32-bit and 40-bit support
? Easy to program instruction set
? Load/store register based instructions
? Outstanding code density
? User extensible instruction set
APPLICATION BENEFITS
?High-performance DSP capabilities
?Excellent power/cost/speed balance
?Excellent multimedia audio/video processing
?Power efficient baseband processing performance
?DSP and system control functions handling capabilities
CORE FEATURES
? Quad-MAC/Six-ALU DSP core
? 4+1 instructions per cycle
? Up to 350MHz, 8-stage pipeline design
? Up to 1750 million instructions/sec
? Dual 64-bit wide Load/Store data ports
? Z.Turbo coprocessor extensions capable
? 24-bit address space
? HW managed instructions scheduling
? HW/SW controlled power management
? Real-time trace and profiling capability
? Full AMBA/AHB support (optional)
? JTAG debug interface
? Static, single phase clocked design
? Compatible with all other ZSP cores
ARCHITECTURE FEATURES
? Embedded control processing efficiency
? 32-bit addressing capabilities
? 16 and 32-bit standard instruction set
? Extensive 32-bit and 40-bit support
產(chǎn)品屬性
- 型號(hào)：
ZSP200
- 制造商：
LSI
- 制造商全稱：
LSI
- 功能描述：
Highly Efficient Quad-MAC DSP Core
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
上海尊瑞 |
23+ |
PCB |
11200 |
原廠授權(quán)一級(jí)代理、全球訂貨優(yōu)勢(shì)渠道、可提供一站式BO |
詢價(jià) | ||
REP-AVAGO |
22+ |
Encoder |
56000 |
全新原裝進(jìn)口,假一罰十 |
詢價(jià) | ||
ZYWYN |
20+ |
MSOP-8P |
2960 |
誠(chéng)信交易大量庫(kù)存現(xiàn)貨 |
詢價(jià) | ||
ZYWYN |
24+ |
MSOP8 |
8000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開(kāi)13%增 |
詢價(jià) | ||
REP-AVAGO |
23+ |
REP-AVAGO |
28520 |
原廠授權(quán)代理分銷現(xiàn)貨只做原裝正邁科技樣品支持現(xiàn)貨 |
詢價(jià) | ||
NO |
23+ |
MSOP-10 |
2285 |
優(yōu)勢(shì)庫(kù)存 |
詢價(jià) | ||
REP-AVAGO |
22+ |
Encoder |
56000 |
全新原裝進(jìn)口,假一罰十 |
詢價(jià) | ||
ZYWYN |
23+ |
MSOP-8 |
4500 |
全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷售! |
詢價(jià) | ||
ZYWYN |
23+ |
MSOP-8 |
105 |
現(xiàn)貨庫(kù)存 |
詢價(jià) | ||
ZYWYN |
23+ |
MSOP8 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) |
