26LS32-SMD中文資料SYC數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

General Description

The DS26LS32 and DS26LS32A are quad differential line receivers

designed to meet the RS-422, RS-423 and Federal

Standards 1020 and 1030 for balanced and unbalanced digital

data transmission.

The DS26LS32 and DS26LS32A have an input sensitivity of

200 mV over the input voltage range of ±7V and the

DS26LS33 have an input sensitivity of 500 mV over the input

voltage range of ±15V.

The DS26LS32A differ in function from the popular

DS26LS32 and DS26LS33 in that input pull-up and

pull-down resistors are included which prevent output oscillation

on unused channels.

Each version provides an enable and disable function common

to all four receivers and features TRI-STATE ? outputs

with 8 mA sink capability. Constructed using low power

Schottky processing, these devices are available over the

full military and commerical operating temperature ranges.

Features

n High differential or common-mode input voltage ranges

of ±7V on the DS26LS32 and DS26LS32A and ±15V

on the DS26LS33

n ±0.2V sensitivity over the input voltage range on the

DS26LS32 and DS26LS32A, ±0.5V sensitivity on the

DS26LS33

n DS26LS32 and DS26LS32A meet all requirements of

RS-422 and RS-423

n 6k minimum input impedance

n 100 mV input hysteresis on the DS26LS32 and

DS26LS32A, 200 mV on the DS26LS33

n Operation from a single 5V supply

n TRI-STATE outputs, with choice of complementary

output enables for receiving directly onto a data bus