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5T93GL06集成電路(IC)的時鐘緩沖器驅(qū)動器規(guī)格書PDF中文資料

5T93GL06
廠商型號

5T93GL06

參數(shù)屬性

5T93GL06 封裝/外殼為32-LQFP;包裝為管件;類別為集成電路(IC)的時鐘緩沖器驅(qū)動器;產(chǎn)品描述:IC CLK BUFFER 2:6 450MHZ 32TQFP

功能描述

2.5V LVDS, 1:6 Glitchless Clock Buffer TERABUFFER? II

封裝外殼

32-LQFP

文件大小

408.02 Kbytes

頁面數(shù)量

19

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-26 11:09:00

5T93GL06規(guī)格書詳情

General Description

The 5T93GL06 2.5V differential clock buffer is a user- selectable

differential input to six LVDS outputs. The fanout from a differential

input to six LVDS outputs reduces loading on the preceding driver

and provides an efficient clock distribution network. The 5T93GL06

can act as a translator from a differential HSTL, eHSTL, LVEPECL

(2.5V), LVPECL (3.3V), CML, or LVDS input to LVDS outputs. A

single-ended 3.3V / 2.5V LVTTL input can also be used to translate

to LVDS outputs. The redundant input capability allows for a

glitchless change-over from a primary clock source to a secondary

clock source up to 650MHz. Selectable inputs are controlled by SEL.

During the switchover, the output will disable low for up to three clock

cycles of the previously-selected input clock. The outputs will remain

low for up to three clock cycles of the newly-selected clock, after

which the outputs will start from the newly-selected input. A FSEL

pin has been implemented to control the switchover in cases where

a clock source is absent or is driven to DC levels below the minimum

specifications.

The 5T93GL06 outputs can be asynchronously enabled/ disabled.

When disabled, the outputs will drive to the value selected by the GL

pin. Multiple power and grounds reduce noise.

Features

? Guaranteed low skew: <40ps (maximum)

? Very low duty cycle distortion: <100ps (maximum)

? High speed propagation delay: <2ns (maximum)

? Up to 800MHz operation

? Glitchless input clock switching up to 650MHz

? Selectable inputs

? Hot insertable and over-voltage tolerant inputs

? 3.3V/2.5V LVTTL, HSTL, eHSTL, LVEPECL (2.5V), LVPECL

(3.3V), CML or LVDS input interface

? Selectable differential inputs to six LVDS outputs

? Power-down mode

? At power-up, FSEL should be LOW

? 2.5V VDD

? -40°C to 85°C ambient operating temperature

? Available in VFQFN package

? Recommends IDT5T9306 if glitchless input selection is not

required

? Not Recommended for New Designs

? For functional replacement use 8SLVD1208

產(chǎn)品屬性

  • 產(chǎn)品編號:

    5T93GL061PFGI8

  • 制造商:

    Renesas Electronics America Inc

  • 類別:

    集成電路(IC) > 時鐘緩沖器,驅(qū)動器

  • 系列:

    TeraBuffer? II

  • 包裝:

    管件

  • 類型:

    扇出緩沖器(分配),多路復(fù)用器

  • 電路數(shù):

    1

  • 比率 - 輸入:

    2:6

  • 差分 - 輸入:

    是/是

  • 輸入:

    CML,eHSTL,HSTL,LVDS,LVPECL,LVTTL

  • 輸出:

    LVDS

  • 電壓 - 供電:

    2.3V ~ 2.7V

  • 工作溫度:

    -40°C ~ 85°C

  • 安裝類型:

    表面貼裝型

  • 封裝/外殼:

    32-LQFP

  • 供應(yīng)商器件封裝:

    32-TQFP(7x7)

  • 描述:

    IC CLK BUFFER 2

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