74ABT651DB中文資料飛利浦數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The 74ABT651 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.

The 74ABT651 transceiver/register consists of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (OEAB, OEBA) and Select (SAB, SBA) pins are provided for bus management.

The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74ABT651.

The select pins determine whether data is stored or transferred through the device in real time.

The output enable pins determine the direction of the data flow.

FEATURES

? Independent registers for A and B buses

? The 74ABT651 is the inverting version of the 74ABT652

? Multiplexed real-time and stored data

? 3-State outputs

? Live insertion/extraction permitted.

? Power-up 3-State

? Power-up reset

? Output capability: +64mA/–32mA

? Latch-up protection exceeds 500mA per Jedec Std 17

? ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model