74ALS273D中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書
74ALS273D規(guī)格書詳情
DESCRIPTION
The 74ALS273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously.
The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output.
FEATURES
? Eight edge-triggered D-type flip-flops
? Buffered common clock
? Buffered asynchronous master reset
? See 74ALS377 for clock enable version
? See 74ALS373 for transparent latch version
? See 74ALS374 for 3-State version
產(chǎn)品屬性
- 型號(hào)：
74ALS273D
- 制造商：
PHILIPS
- 制造商全稱：
NXP Semiconductors
- 功能描述：
Octal D-type flip-flop
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
TI |
24+ |
5.2mm |
2987 |
只售原裝自家現(xiàn)貨!誠(chéng)信經(jīng)營(yíng)!歡迎來電! |
詢價(jià) | ||
AVG SEMICONDUCTOR |
21+ |
SOP20 |
4569 |
原裝現(xiàn)貨假一賠十 |
詢價(jià) | ||
TI |
21+ |
原廠原裝 |
13880 |
公司只售原裝,支持實(shí)單 |
詢價(jià) | ||
PHI |
2016+ |
SOP |
4558 |
只做進(jìn)口原裝現(xiàn)貨!假一賠十! |
詢價(jià) | ||
PHILIPS |
23+ |
SOP |
12300 |
詢價(jià) | |||
PHI |
22+23+ |
SOP |
27381 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
TI |
21+ |
原廠原裝 |
3200 |
公司只做原裝,誠(chéng)信經(jīng)營(yíng) |
詢價(jià) | ||
NS |
2216+ |
SOP |
10708 |
一級(jí)代理/分銷渠道價(jià)格優(yōu)勢(shì) 十年芯程一路只做原裝正品 |
詢價(jià) | ||
ti |
24+ |
N/A |
6980 |
原裝現(xiàn)貨,可開13%稅票 |
詢價(jià) | ||
NS |
5.2MM |
608900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) |
