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74ALS377DB中文資料飛利浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書
74ALS377DB規(guī)格書詳情
DESCRIPTION
The 74ALS377 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) is Low.
The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. The E input must be stable one setup time prior to the Low-to-High clock transition for predictable operation.
FEATURES
? Ideal for addressable register applications
? Enable for address and data synchronization applications
? Eight edge-triggered D-type flip-flops
? Buffered common clock
? See 74ALS273 for master reset version
? See 74ALS373 for transparent latch version
? See 74ALS374 for 3-State version
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
24+ |
5000 |
公司存貨 |
詢價(jià) | ||||
FAIRCHILD |
SOP16-3.9MM |
608900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) | |||
TI |
24+ |
35200 |
一級代理/放心采購 |
詢價(jià) | |||
FAIRCHILD |
1815+ |
SOP16-3.9 |
6528 |
只做原裝正品現(xiàn)貨!或訂貨,假一賠十! |
詢價(jià) | ||
TI |
2023+ |
SOP14 |
8700 |
原裝現(xiàn)貨 |
詢價(jià) | ||
TI/德州儀器 |
2021+ |
DIP |
100500 |
一級代理專營品牌!原裝正品,優(yōu)勢現(xiàn)貨,長期排單到貨 |
詢價(jià) | ||
原裝 |
1922+ |
SOP16-3.9 |
12600 |
詢價(jià) | |||
ti |
24+ |
500000 |
行業(yè)低價(jià),代理渠道 |
詢價(jià) | |||
S |
21+ |
DIP |
25 |
原裝現(xiàn)貨假一賠十 |
詢價(jià) | ||
ti |
24+ |
N/A |
6980 |
原裝現(xiàn)貨,可開13%稅票 |
詢價(jià) |