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74F114

DualJ-Knegativeedge-triggeredflip-flopwithcommonclockandreset

DESCRIPTION The74F114,DualNegativeedge-triggeredJK-TypeFlip-Flopwithcommonclockandresetinputs,featuresindividualJ,K,Clock(CP),Set(SD)andReset(RD)inputs,trueandcomplementaryoutputs.TheSDandRDinputs,whenLow,setorresettheoutputsasshownintheFunctionTable

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74F114

DualJKNegativeEdge-TriggeredFlip-FlopwithCommonClocksandClears

GeneralDescription The74F114containstwohigh-speedJKflip-flopswithcommonClockandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJandKinp

FairchildFairchild Semiconductor

仙童半導體飛兆/仙童半導體公司

74F114PC

DualJKNegativeEdge-TriggeredFlip-FlopwithCommonClocksandClears

GeneralDescription The74F114containstwohigh-speedJKflip-flopswithcommonClockandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJandKinp

FairchildFairchild Semiconductor

仙童半導體飛兆/仙童半導體公司

74F114SC

DualJKNegativeEdge-TriggeredFlip-FlopwithCommonClocksandClears

GeneralDescription The74F114containstwohigh-speedJKflip-flopswithcommonClockandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJandKinp

FairchildFairchild Semiconductor

仙童半導體飛兆/仙童半導體公司

N74F114D

DualJ-Knegativeedge-triggeredflip-flopwithcommonclockandreset

DESCRIPTION The74F114,DualNegativeedge-triggeredJK-TypeFlip-Flopwithcommonclockandresetinputs,featuresindividualJ,K,Clock(CP),Set(SD)andReset(RD)inputs,trueandcomplementaryoutputs.TheSDandRDinputs,whenLow,setorresettheoutputsasshownintheFunctionTable

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

N74F114N

DualJ-Knegativeedge-triggeredflip-flopwithcommonclockandreset

DESCRIPTION The74F114,DualNegativeedge-triggeredJK-TypeFlip-Flopwithcommonclockandresetinputs,featuresindividualJ,K,Clock(CP),Set(SD)andReset(RD)inputs,trueandcomplementaryoutputs.TheSDandRDinputs,whenLow,setorresettheoutputsasshownintheFunctionTable

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

詳細參數(shù)

  • 型號：

    74F114D

  • 功能描述：

    J-K-Type Flip-Flop

供應商型號品牌批號封裝庫存備注價格
sig
24+
N/A
6980
原裝現(xiàn)貨,可開13%稅票
 詢價
24+
5000
公司存貨
 詢價
SIGNETIC
1990
495
原裝正品長期供貨，如假包賠包換 徐小姐13714450367
 詢價
S
23+
DIP
50000
全新原裝正品現(xiàn)貨,支持訂貨
 詢價
NXP/恩智浦
23+
DIP14
13852
原廠授權代理,海外優(yōu)勢訂貨渠道。可提供大量庫存,詳
 詢價
S
23+
NA/
3995
原裝現(xiàn)貨,當天可交貨,原型號開票
 詢價
FSC
2016+
DIP
3000
只做原裝,假一罰十,公司可開17%增值稅發(fā)票!
 詢價
FAIRCHILD
23+
NA
19960
只做進口原裝,終端工廠免費送樣
 詢價
FAIRCHILD
新
50
全新原裝 貨期兩周
 詢價
FAIR
23+
NA
9856
原裝正品,假一罰百!
 詢價
更多74F114D供應商 更新時間2024-11-20 16:20:00

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