74LS76N中文資料摩托羅拉數(shù)據(jù)手冊(cè)PDF規(guī)格書
74LS76N規(guī)格書詳情
The SN54/74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform according to the Truth Table as long as minimum set-up times are observed. Input data is transferred to the outputs on the HIGH-to-LOW clock transitions.
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|---|---|---|---|---|---|---|---|
MOT |
23+ |
SOP |
3200 |
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詢價(jià) | ||
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24+ |
DIP-16 |
50 |
詢價(jià) | |||
Roches |
21+ |
25000 |
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詢價(jià) | |||
HIT |
24+ |
SMD-14 |
16800 |
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詢價(jià) | ||
MAT |
2020+ |
DIP14 |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開(kāi)13%增 |
詢價(jià) | ||
MAT |
96+ |
DIP14 |
61 |
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詢價(jià) | ||
MAT |
2339+ |
DIP14 |
21322 |
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詢價(jià) | ||
MAT |
21+ |
DIP14 |
1227 |
原裝現(xiàn)貨假一賠十 |
詢價(jià) | ||
MAT |
21+ |
DIP14 |
9866 |
詢價(jià) | |||
ti |
24+ |
N/A |
6980 |
原裝現(xiàn)貨,可開(kāi)13%稅票 |
詢價(jià) |
