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74LV165APW集成電路(IC)移位寄存器規(guī)格書PDF中文資料
廠商型號 |
74LV165APW |
參數(shù)屬性 | 74LV165APW 封裝/外殼為16-TSSOP(0.173",4.40mm 寬);包裝為管件;類別為集成電路(IC) > 移位寄存器;產(chǎn)品描述:IC 8BIT SHIFT REGISTER 16TSSOP |
功能描述 | 并行或串行至串行 |
文件大小 |
810.72 Kbytes |
頁面數(shù)量 |
19 頁 |
生產(chǎn)廠商 | Nexperia B.V. All rights reserved |
企業(yè)簡稱 |
NEXPERIA【安世】 |
中文名稱 | 安世半導(dǎo)體(中國)有限公司官網(wǎng) |
原廠標(biāo)識 | |
數(shù)據(jù)手冊 | |
更新時間 | 2024-11-15 19:57:00 |
74LV165APW規(guī)格書詳情
1. General description
The 74LV165A is an 8-bit parallel-load or serial-in shift register with complementary serial
outputs (Q7 and Q7) available from the last stage. When the parallel-load input (PL) is
LOW, parallel data from the inputs D0 to D7 are loaded into the register asynchronously.
When input PL is HIGH, data enters the register serially at the input DS. It shifts one place
to the right (Q0?? Q1?? Q2, etc.) with each positive-going clock transition. This feature
allows parallel-to-serial converter expansion by tying the output Q7 to the input DS of the
succeeding stage.
The clock input is a gate-OR structure which allows one input to be used as an active
LOW clock enable input (CE) input. The pin assignment for the inputs CP and CE is
arbitrary and can be reversed for layout convenience. The LOW-to-HIGH transition of the
input CE should only take place while CP HIGH for predictable operation.
Schmitt-trigger action at all inputs, makes the circuit tolerant for slower input rise and fall
times. It is fully specified for partial-power-down applications using IOFF. The IOFF circuitry
disables the output, preventing the damaging current backflow through the device when it
is powered down.
2. Features and benefits
? Wide supply voltage range from 2.0 V to 5.5 V
? Synchronous parallel-to-serial applications
? Synchronous serial input for easy expansion
? Latch-up performance exceeds 250 mA
? CMOS LOW power consumption
? 5.5 V tolerant inputs/outputs
? Direct interface with TTL levels (2.7 V to 3.6 V)
? Power-down mode
? Complies with JEDEC standards:
? JESD8-5 (2.3 V to 2.7 V)
? JESD8B/JESD36 (2.7 V to 3.6 V)
? JESD8-1A (4.5 V to 5.5 V)
? ESD protection:
? HBM JESD22-A114-A exceeds 2000 V
? MM JESD22-A115-A exceeds 200 V
? Specified from ?40 ?C to +85 ?C
74LV165APW屬于集成電路(IC) > 移位寄存器。安世半導(dǎo)體(中國)有限公司制造生產(chǎn)的74LV165APW移位寄存器移位寄存器是低級邏輯器件,通常用于在串行和并行方式之間轉(zhuǎn)換數(shù)字邏輯信號形式的數(shù)據(jù),或在數(shù)字字內(nèi)移動數(shù)據(jù)位的位置。移位寄存器通常使用集成到一個設(shè)備中的一組觸發(fā)器來實現(xiàn),常用于集成度更高的邏輯器件,但仍可用于 I/O 擴展等應(yīng)用,在這些應(yīng)用中離散形式的函數(shù)可能會非常有用。
產(chǎn)品屬性
更多- 產(chǎn)品編號:
74LV165APW,118
- 制造商:
Nexperia USA Inc.
- 類別:
集成電路(IC) > 移位寄存器
- 系列:
74LV
- 包裝:
管件
- 邏輯類型:
移位寄存器
- 輸出類型:
補充型
- 功能:
并行或串行至串行
- 電壓 - 供電:
2V ~ 5.5V
- 工作溫度:
-40°C ~ 85°C
- 安裝類型:
表面貼裝型
- 封裝/外殼:
16-TSSOP(0.173",4.40mm 寬)
- 供應(yīng)商器件封裝:
16-TSSOP
- 描述:
IC 8BIT SHIFT REGISTER 16TSSOP
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
24+ |
500 |
大批量供應(yīng)優(yōu)勢庫存熱賣 |
詢價 | ||||
NEXPERIA/安世 |
1727+ |
NA |
5411 |
詢價 | |||
NXP |
2016+ |
TSSOP |
3000 |
只做原裝,假一罰十,公司可開17%增值稅發(fā)票! |
詢價 | ||
NXP(恩智浦) |
23+ |
9865 |
原裝正品,假一賠十 |
詢價 | |||
NXP(恩智浦) |
23+ |
NA |
6000 |
原裝現(xiàn)貨訂貨價格優(yōu)勢 |
詢價 | ||
NXP |
23+ |
NA |
940 |
專業(yè)電子元器件供應(yīng)鏈正邁科技特價代理QQ1304306553 |
詢價 | ||
NXP(恩智浦) |
23+ |
N/A |
12000 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | ||
NEXPERIA/安世 |
22+ |
SMD |
12245 |
現(xiàn)貨,原廠原裝假一罰十! |
詢價 | ||
NXP |
1735+ |
TSSOP |
6528 |
科恒偉業(yè)!只做原裝正品!假一賠十! |
詢價 | ||
Nexperia(安世) |
2021+ |
TSSOP-16 |
499 |
詢價 |