74LVT322373中文資料仙童半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

General Description

The LVT322373 and LVTH322373 contain thirty-two noninverting latches with 3-STATE outputs and are intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in a high impedance state.

The LVTH322373 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.

Features

■ Input and output interface capability to systems at 5V VCC

■ Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH322373), also available without bushold feature (74LVT322373)

■ Live insertion/extraction permitted

■ Power Up/Down high impedance provides glitch-free bus loading

■ Outputs include equivalent series resistance of 25? to make external termination resistors unnecessary and reduce overshoot and undershoot

■ ESD performance:

Human-body model > 2000V

Machine model > 200V

Charged-device model > 1000V

■ Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)