74LVT373DB中文資料飛利浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The 74LVT373 device is designed specifically for low–voltage (3.3V) VCC operation, but can provide a TTL interface to a 5V system environment.

The 74LVT373 high-performance BiCMOS device combines zero static and low dynamic power dissipation with high speed and high output drive.

FEATURES

? Designed for use in the 3.3V high–performance market

? Supports mixed–mode signal operation; 5V input and output voltages with 3.3V VCC

? Bus–hold inputs eliminate the need for external pull-up resistors to hold unused pins

? Live insertion/extraction permitted

? No bus current loading when output is tied to 5V bus

? 8–bit transparent latch

? 3-State output buffers

? Zero-static power dissipation

? Pin and function compatibility with ABT

? AC and DC performance compatibility with ABT

? Latch–up protection exceeds 500mA per JEDEC JC40.2 Std 17

? ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model