首頁>A6810SEP>規(guī)格書詳情

A6810SEP中文資料Allegro數(shù)據(jù)手冊PDF規(guī)格書

A6810SEP
廠商型號

A6810SEP

功能描述

DABiC-IV, 10-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS

文件大小

150.16 Kbytes

頁面數(shù)量

8

生產(chǎn)廠商 Allegro MicroSystems
企業(yè)簡稱

Allegro

中文名稱

Allegro MicroSystems官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2024-11-6 15:18:00

A6810SEP規(guī)格書詳情

The A6809– and A6810– devices combine 10-bit CMOS shift registers, accompanying data latches and control circuitry with bipolar sourcing outputs and pnp active pull downs. Designed primarily to drive vacuum-fluorescent displays, the 60 V and -40 mA output ratings also allow these devices to be used in many other peripheral power driver applications. The A6809– and A6810– feature an increased data input rate (compared with the older UCN/UCQ5810-F) and a controlled output slew rate. The A6809xLW and A6810xLW are identical except for pinout.

The CMOS shift register and latches allow direct interfacing with microprocessor-based systems. With a 3.3 V or 5 V logic supply, typical serial-data input rates are up to 33 MHz.

A CMOS serial data output permits cascade connections in applications requiring additional drive lines. Similar devices are avail-able as the A6811– (12 bits), A6812– (20 bits), and A6818– (32 bits). The A6809– and A6810– output source drivers are npn Darling tons, capable of sourcing up to 40 mA. The controlled output slew rate reduces electromagnetic noise, which is an important consideration in systems that include telecommunications and/or microprocessors and to meet government emissions regulations. For inter-digit blanking, all output drivers can be disabled and all sink drivers turned on with a BLANKING input high. The pnp active pull-downs will sink at least 2.5 mA.

All devices are available in two temperature ranges for optimum performance in commercial (suffix S-) or industrial (suffix E-) applications. The A6810– is provided in three package styles for through-hole DIP (suffix -A), surface-mount SOIC (suffix -LW), or minimum-area surface-mount PLCC (suffix -EP). The A6809– is provided in the SOIC (suffix -LW) only. Copper lead frames, low logic-power dissipation, and low output-saturation voltages allow all devices to source 25 mA from all outputs continuously over the maximum operating temperature range.

FEATURES

■ Controlled Output Slew Rate

■ High-Speed Data Storage

■ 60 V Minimum Output Breakdown

■ High Data Input Rate

■ PNP Active Pull-Downs

■ Low Output-Saturation Voltages

■ Low-Power CMOS Logic and Latches

■ Improved Replacements

for TL4810–, UCN5810–, and UCQ5810–

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價格
ALLEGRO
22+
SOP20
25000
原裝現(xiàn)貨,價格優(yōu)惠,假一罰十
詢價
ALLEGRO/雅麗高
22+
SOP20
9600
原裝現(xiàn)貨,優(yōu)勢供應(yīng),支持實(shí)單!
詢價
ALLEGRO
22+
原廠原封
8200
原裝現(xiàn)貨庫存.價格優(yōu)勢!!
詢價
Allegro MicroSystems
24+
20-SOIC
9350
獨(dú)立分銷商 公司只做原裝 誠心經(jīng)營 免費(fèi)試樣正品保證
詢價
ALLEGRO
23+
原廠原包
19960
只做進(jìn)口原裝 終端工廠免費(fèi)送樣
詢價
ALLEGRO/雅麗高
23+
PLCC20
5000
原廠授權(quán)代理,海外優(yōu)勢訂貨渠道??商峁┐罅繋齑?詳
詢價
Allegro MicroSystems, LLC
21+
20-SOIC
36500
一級代理/放心采購
詢價
Allegro MicroSystems LLC
22+
20SOIC
9000
原廠渠道,現(xiàn)貨配單
詢價
ALLEGRO
23+
SOP20
3000
全新原裝、誠信經(jīng)營、公司現(xiàn)貨銷售!
詢價
ALLEGRO/雅麗高
23+
SOP20
50000
全新原裝正品現(xiàn)貨,支持訂貨
詢價