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AD9515/PCBZ開發(fā)板套件編程器的評(píng)估演示板及套件規(guī)格書PDF中文資料

AD9515/PCBZ
廠商型號(hào)

AD9515/PCBZ

參數(shù)屬性

AD9515/PCBZ 類別為開發(fā)板套件編程器的評(píng)估演示板及套件;產(chǎn)品描述:BOARD EVAL CLOCK 2CH AD9515

功能描述

1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs
BOARD EVAL CLOCK 2CH AD9515

文件大小

407.42 Kbytes

頁面數(shù)量

28

生產(chǎn)廠商 Analog Devices
企業(yè)簡(jiǎn)稱

AD亞德諾

中文名稱

亞德諾半導(dǎo)體技術(shù)有限公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

原廠下載下載地址一下載地址二到原廠下載

更新時(shí)間

2025-5-24 22:58:00

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AD9515/PCBZ規(guī)格書詳情

AD9515/PCBZ屬于開發(fā)板套件編程器的評(píng)估演示板及套件。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9515/PCBZ評(píng)估和演示板及套件該系列產(chǎn)品提供了一種方便的方法,在經(jīng)過驗(yàn)證的實(shí)施環(huán)境中評(píng)估某些重點(diǎn)器件的性能或特性。評(píng)估方法通常有完善的文檔說明,并且視乎具體情況由評(píng)估軟件提供支持。產(chǎn)品通常由印刷電路板組成,板上已裝有重點(diǎn)器件以及必要或有用的支持元器件,另外也可能包括其他組件,例如電纜或電源。對(duì)于數(shù)量特別多或類別獨(dú)特的器件類別(如 ADC、DAC 和開關(guān)模式電源),評(píng)估平臺(tái)可組合為一個(gè)單獨(dú)的產(chǎn)品系列。

GENERAL DESCRIPTION

The AD9515 features a two-output clock distribution IC in a

design that emphasizes low jitter and phase noise to maximize

data converter performance. Other applications with

demanding phase noise and jitter requirements also benefit

from this part.

There are two independent clock outputs. One output is

LVPECL, while the other output can be set to either LVDS or

CMOS levels. The LVPECL output operates to 1.6 GHz. The

other output operates to 800 MHz in LVDS mode and to

250 MHz in CMOS mode.

Each output has a programmable divider that can be set to

divide by a selected set of integers ranging from 1 to 32. The

phase of one clock output relative to the other clock output can

be set by means of a divider phase select function that serves as

a coarse timing adjustment.

The LVDS/CMOS output features a delay element with three

selectable full-scale delay values (1.5 ns, 5 ns, and 10 ns), each

with 16 steps of fine adjustment.

The AD9515 does not require an external controller for

operation or setup. The device is programmed by means of

11 pins (S0 to S10) using 4-level logic. The programming pins

are internally biased to ? VS. The VREF pin provides a level of

? VS. VS (3.3 V) and GND (0 V) provide the other two logic levels.

The AD9515 is ideally suited for data converter clocking

applications where maximum converter performance is

achieved by encode signals with subpicosecond jitter.

The AD9515 is available in a 32-lead LFCSP and operates from

a single 3.3 V supply. The temperature range is ?40°C to +85°C.

FEATURES

1.6 GHz differential clock input

2 programmable dividers

Divide-by in range from1 to 32

Phase select for coarse delay adjust

1.6 GHz LVPECL clock output

Additive output jitter 225 fs rms

800 MHz/250 MHz LVDS/CMOS clock output

Additive output jitter 300 fs rms/290 fs rms

Time delays up to 10 ns

Device configured with 4-level logic pins

Space-saving, 32-lead LFCSP

APPLICATIONS

Low jitter, low phase noise clock distribution

Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs

High performance wireless transceivers

High performance instrumentation

Broadband infrastructure

ATE

產(chǎn)品屬性

更多
  • 產(chǎn)品編號(hào):

    AD9515/PCBZ

  • 制造商:

    Analog Devices Inc.

  • 類別:

    開發(fā)板,套件,編程器 > 評(píng)估和演示板及套件

  • 描述:

    BOARD EVAL CLOCK 2CH AD9515

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
ADI
2016+
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2154
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24+
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80000
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ADI
19+
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原廠代理渠道,每一顆芯片都可追溯原廠;
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