GENERAL DESCRIPTION

The AD9515 features a two-output clock distribution IC in a design that emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this part.

FEATURES

1.6 GHz differential clock input

2 programmable dividers

Divide-by in range from1 to 32

Phase select for coarse delay adjust

1.6 GHz LVPECL clock output

Additive output jitter 225 fs rms

800 MHz/250 MHz LVDS/CMOS clock output

Additive output jitter 300 fs rms/290 fs rms

Time delays up to 10 ns

Device configured with 4-level logic pins

Space-saving, 32-lead LFCSP

APPLICATIONS

Low jitter, low phase noise clock distribution

Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs

High performance wireless transceivers

High performance instrumentation

Broadband infrastructure

ATE

AD9515屬于集成電路（IC） > 時鐘緩沖器，驅(qū)動器。亞德諾半導體技術(shù)有限公司制造生產(chǎn)的AD9515時鐘緩沖器，驅(qū)動器時鐘緩沖器和驅(qū)動器集成電路產(chǎn)品族中的產(chǎn)品用于幫助信號在系統(tǒng)中傳輸，常用作頻率/時間參考信號，以同步系統(tǒng)內(nèi)的活動。盡管這些器件最常用到的功能就是緩沖（即，為使信號不受驅(qū)動負載的影響而從某個信號源復制信號），但是該產(chǎn)品族中的某些器件還能執(zhí)行其他功能，例如選擇性改變緩沖信號路徑、按某個整數(shù)值分割信號頻率，或進行所用電信號格式轉(zhuǎn)換。