AD9512UCPZ-EP集成電路（IC）的時(shí)鐘緩沖器驅(qū)動器規(guī)格書PDF中文資料

AD9512UCPZ-EP屬于集成電路（IC）的時(shí)鐘緩沖器驅(qū)動器。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9512UCPZ-EP時(shí)鐘緩沖器，驅(qū)動器時(shí)鐘緩沖器和驅(qū)動器集成電路產(chǎn)品族中的產(chǎn)品用于幫助信號在系統(tǒng)中傳輸，常用作頻率/時(shí)間參考信號，以同步系統(tǒng)內(nèi)的活動。盡管這些器件最常用到的功能就是緩沖（即，為使信號不受驅(qū)動負(fù)載的影響而從某個(gè)信號源復(fù)制信號），但是該產(chǎn)品族中的某些器件還能執(zhí)行其他功能，例如選擇性改變緩沖信號路徑、按某個(gè)整數(shù)值分割信號頻率，或進(jìn)行所用電信號格式轉(zhuǎn)換。

GENERAL DESCRIPTION

The AD9512-EP provides a multi-output clock distribution in a design that emphasizes low jitter and low phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements can also benefit from this part.

There are five independent clock outputs. Three outputs are LVPECL (1.2 GHz), and two are selectable as either LVDS (800 MHz) or CMOS (250 MHz) levels.

FEATURES

Two 1.6 GHz, differential clock inputs

5 programmable dividers, 1 to 32, all integers

3 independent 1.2 GHz LVPECL outputs

Additive output jitter 225 fs rms

2 independent 800 MHz/250 MHz LVDS/CMOS clock outputs

Additive output jitter: 275 fs rms

Serial control port

Space-saving 48-lead LFCSP

ENHANCED PRODUCT FEATURES

Supports defense and aerospace applications (AQEC standard)

Military temperature range (?55°C to +85°C)

Controlled manufacturing baseline

1 assembly/test site

1 fabrication site

Enhanced product change notification

Qualification data available on request

APPLICATIONS

Low jitter, low phase noise clock distribution

Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs

Defense and aerospace applications