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AD9523BCPZ集成電路(IC)應(yīng)用特定時(shí)鐘/定時(shí)規(guī)格書PDF中文資料
廠商型號(hào) |
AD9523BCPZ |
參數(shù)屬性 | AD9523BCPZ 封裝/外殼為72-VFQFN 裸露焊盤,CSP;包裝為管件;類別為集成電路(IC) > 應(yīng)用特定時(shí)鐘/定時(shí);產(chǎn)品描述:IC INTEGER-N CLCK GEN 72LFCSP |
功能描述 | Jitter Cleaner and Clock Generator |
文件大小 |
1.01127 Mbytes |
頁面數(shù)量 |
60 頁 |
生產(chǎn)廠商 | Analog Devices |
企業(yè)簡稱 |
AD【亞德諾】 |
中文名稱 | 亞德諾半導(dǎo)體技術(shù)有限公司官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2024-11-15 16:56:00 |
AD9523BCPZ規(guī)格書詳情
GENERAL DESCRIPTION
The AD9523 provides a low power, multi-output, clock distribution function with low jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 3.6 GHz to 4.0 GHz.
FEATURES
Output frequency: <1 MHz to 1 GHz
Start-up frequency accuracy: <±100 ppm (determined by
VCXO reference accuracy)
Zero delay operation
Input-to-output edge timing: <150 ps
14 outputs: configurable LVPECL, LVDS, HSTL, and LVCMOS
14 dedicated output dividers with jitter-free adjustable delay
Adjustable delay: 63 resolution steps of ? period of VCO
output divider
Output-to-output skew: <50 ps
Duty cycle correction for odd divider settings
Automatic synchronization of all outputs on power-up
Absolute output jitter: <200 fs at 122.88 MHz
Integration range: 12 kHz to 20 MHz
Distribution phase noise floor: ?160 dBc/Hz
Digital lock detect
Nonvolatile EEPROM stores configuration settings
SPI- and I2C-compatible serial control port
Dual PLL architecture
PLL1
Low bandwidth for reference input clock cleanup with
external VCXO
Phase detector rate up to130 MHz
Redundant reference inputs
Automatic and manual reference switchover modes
Revertive and nonrevertive switching
Loss of reference detection with holdover mode
Low noise LVCMOS output from VCXO used for RF/IF
synthesizers
PLL2
Phase detector rate up to 259 MHz
Integrated low noise VCO
APPLICATIONS
LTE and multicarrier GSM base stations
Wireless and broadband infrastructure
Medical instrumentation
Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
Low jitter, low phase noise clock distribution
Clock generation and translation for SONET, 10Ge, 10G FC,
and other 10 Gbps protocols
Forward error correction (G.710)
High performance wireless transceivers
ATE and high performance instrumentation
AD9523BCPZ屬于集成電路(IC) > 應(yīng)用特定時(shí)鐘/定時(shí)。亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9523BCPZ應(yīng)用特定時(shí)鐘/定時(shí)專用時(shí)鐘和計(jì)時(shí) IC(集成電路)產(chǎn)品族中的產(chǎn)品主要用于執(zhí)行與時(shí)間或頻率信息生成和分配相關(guān)的各種操作,適合的設(shè)計(jì)環(huán)境較特定,例如 AMD 和 Intel 的中央處理單元 (CPU) 或圖形處理單元 (GPU)、DVD 音頻設(shè)備、藍(lán)光光盤播放器、以太網(wǎng)設(shè)備、PCIe、SATA、光纖通道接口、車載娛樂總線等。
產(chǎn)品屬性
更多- 產(chǎn)品編號(hào):
AD9523BCPZ
- 制造商:
Analog Devices Inc.
- 類別:
集成電路(IC) > 應(yīng)用特定時(shí)鐘/定時(shí)
- 包裝:
管件
- PLL:
是
- 主要用途:
以太網(wǎng),光纖通道,SONET/SDH
- 輸入:
CMOS
- 輸出:
HSTL,LVCMOS,LVDS,LVPECL
- 比率 - 輸入:
2:14
- 差分 - 輸入:
是/是
- 頻率 - 最大值:
1GHz
- 電壓 - 供電:
1.71V ~ 3.465V
- 工作溫度:
-40°C ~ 85°C
- 安裝類型:
表面貼裝型
- 封裝/外殼:
72-VFQFN 裸露焊盤,CSP
- 供應(yīng)商器件封裝:
72-LFCSP-VQ(10x10)
- 描述:
IC INTEGER-N CLCK GEN 72LFCSP
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
ADI(亞德諾) |
2405+ |
LFCSP-72 |
50000 |
只做原裝優(yōu)勢現(xiàn)貨庫存,渠道可追溯 |
詢價(jià) | ||
ADI(亞德諾) |
23+ |
LFCSP-72 |
7087 |
優(yōu)勢代理渠道,原裝正品,可全系列訂貨開增值稅票 |
詢價(jià) | ||
AD |
17+ |
LFCSP |
20 |
原裝庫存有訂單來談優(yōu)勢 |
詢價(jià) | ||
ADI/亞德諾 |
23+ |
QFN |
15000 |
原裝現(xiàn)貨假一賠十 |
詢價(jià) | ||
ADI |
2018+ |
LFCSP |
30000 |
ADI一級(jí)代理原裝現(xiàn)貨假一罰十 |
詢價(jià) | ||
ADI |
19+ |
LFCSP |
35210 |
原裝現(xiàn)貨/放心購買 |
詢價(jià) | ||
ADI/亞德諾 |
22+ |
QFN |
8000 |
原裝正品支持實(shí)單 |
詢價(jià) | ||
ADI(亞德諾) |
23+ |
LFCSP-72 |
13620 |
公司只做原裝正品,假一賠十 |
詢價(jià) | ||
ADI/亞德諾 |
21+ |
QFN |
10000 |
只做原裝,質(zhì)量保證 |
詢價(jià) | ||
ADI |
23+ |
LFCSP |
6000 |
全新原裝現(xiàn)貨、誠信經(jīng)營! |
詢價(jià) |