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AD9558集成電路(IC)的應用特定時鐘/定時規(guī)格書PDF中文資料

AD9558
廠商型號

AD9558

參數(shù)屬性

AD9558 封裝/外殼為64-VFQFN 裸露焊盤,CSP;包裝為管件;類別為集成電路(IC)的應用特定時鐘/定時;產品描述:IC CLOCK TRANSLATOR 64LFCSP

功能描述

Quad Input Multiservice Line Card Adaptive
IC CLOCK TRANSLATOR 64LFCSP

封裝外殼

64-VFQFN 裸露焊盤,CSP

文件大小

1.44423 Mbytes

頁面數(shù)量

104

生產廠商 Analog Devices
企業(yè)簡稱

AD亞德諾

中文名稱

亞德諾半導體技術有限公司官網

原廠標識
數(shù)據(jù)手冊

原廠下載下載地址一下載地址二到原廠下載

更新時間

2025-2-4 14:10:00

AD9558規(guī)格書詳情

AD9558屬于集成電路(IC)的應用特定時鐘/定時。由亞德諾半導體技術有限公司制造生產的AD9558應用特定時鐘/定時專用時鐘和計時 IC(集成電路)產品族中的產品主要用于執(zhí)行與時間或頻率信息生成和分配相關的各種操作,適合的設計環(huán)境較特定,例如 AMD 和 Intel 的中央處理單元 (CPU) 或圖形處理單元 (GPU)、DVD 音頻設備、藍光光盤播放器、以太網設備、PCIe、SATA、光纖通道接口、車載娛樂總線等。

GENERAL DESCRIPTION

The AD9558 is a low loop bandwidth clock multiplier that provides jitter cleanup and synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9558 generates an output clock synchronized to up to four external input references. The digital PLL allows for reduction of input time jitter or phase noise associated with the external references. The digitally controlled loop and holdover circuitry of the AD9558 continuously generates a low jitter output clock even when all reference inputs have failed.

The AD9558 operates over an industrial temperature range of ?40°C to +85°C. If a smaller package is required, refer to the AD9557 for the two-input/two-output version of the same part.

FEATURES

Supports GR-1244 Stratum 3 stability in holdover mode

Supports smooth reference switchover with virtually no disturbance on output phase

Supports Telcordia GR-253 jitter generation, transfer, and tolerance for SONET/SDH up to OC-192 systems

Supports ITU-T G.8262 synchronous Ethernet slave clocks

Supports ITU-T G.823, G.824, G.825, and G.8261

Auto/manual holdover and reference switchover

4 reference inputs (single-ended or differential)

Input reference frequencies: 2 kHz to 1250 MHz

Reference validation and frequency monitoring (1 ppm)

Programmable input reference switchover priority

20-bit programmable input reference divider

6 pairs of clock output pins with each pair configurable as a single differential LVDS/HSTL output or as 2 single-ended CMOS outputs

Output frequencies: 352 Hz to 1250 MHz

Programmable 17-bit integer and 24-bit fractional feedback divider in digital PLL

Programmable digital loop filter covering loop bandwidths from 0.1 Hz to 5 kHz (2 kHz maximum for <0.1 dB of peaking)

Low noise system clock multiplier

Frame sync support

Adaptive clocking

Optional crystal resonator for system clock input

On-chip EEPROM to store multiple power-up profiles

Pin program function for easy frequency translation configuration

Software controlled power-down

64-lead, 9 mm × 9 mm, LFCSP package

APPLICATIONS

Network synchronization, including synchronous Ethernet and SDH to OTN mapping/demapping

Cleanup of reference clock jitter

SONET/SDH clocks up to OC-192, including FEC

Stratum 3 holdover, jitter cleanup, and phase transient control

Wireless base station controllers

Cable infrastructure

Data communications

產品屬性

更多
  • 產品編號:

    AD9558BCPZ

  • 制造商:

    Analog Devices Inc.

  • 類別:

    集成電路(IC) > 應用特定時鐘/定時

  • 包裝:

    管件

  • PLL:

  • 主要用途:

    以太網,SONET/SDH,Stratum

  • 輸入:

    CMOS,LVDS,LVPECL

  • 輸出:

    CMOS,HSTL,LVDS

  • 比率 - 輸入:

    4:6

  • 差分 - 輸入:

    是/是

  • 頻率 - 最大值:

    1.25GHz

  • 電壓 - 供電:

    1.71V ~ 3.465V

  • 工作溫度:

    -40°C ~ 85°C

  • 安裝類型:

    表面貼裝型

  • 封裝/外殼:

    64-VFQFN 裸露焊盤,CSP

  • 供應商器件封裝:

    64-LFCSP-VQ(9x9)

  • 描述:

    IC CLOCK TRANSLATOR 64LFCSP

供應商 型號 品牌 批號 封裝 庫存 備注 價格
ADI(亞德諾)
21+
6000
只做原裝正品,賣元器件不賺錢交個朋友
詢價
ADI(亞德諾)
22+
NA
10000
原廠原裝現(xiàn)貨
詢價
ADI/亞德諾
22+
LFCSP
5560
特價清倉絕對原裝正品特價
詢價
ADI(亞德諾)/LINEAR
1942+
LFCSP-VQ-64
2532
向鴻只做原裝,倉庫庫存優(yōu)勢數(shù)量請確認
詢價
ADI/亞德諾
22+
LFCSP-64
13000
原裝正品
詢價
ADI/亞德諾
21+
LFCSP-VQ-64
22800
公司只做原裝,誠信經營
詢價
ADI/亞德諾
24+
LFCSP-64
25500
授權代理直銷,原廠原裝現(xiàn)貨,假一罰十,特價銷售
詢價
ADI/亞德諾
21+
QFN
6924
百域芯優(yōu)勢 實單必成 可開13點增值稅
詢價
原裝ADI
21+
64LFCSP
697
原裝現(xiàn)貨假一賠十
詢價
AD
LFCSP64
608900
原包原標簽100%進口原裝常備現(xiàn)貨!
詢價