AD9627BCPZ-105中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The AD9627 is a dual, 12-bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS analog-to-digital converter (ADC). The AD9627 is designed to support communications applications where low cost, small size, and versatility are desired.

FEATURES

SNR = 69.4 dBc (70.4 dBFS) to 70 MHz @ 125 MSPS

SFDR = 85 dBc to 70 MHz @ 125 MSPS

Low power: 750 mW @ 125 MSPS

SNR = 69.2 dBc (70.2 dBFS) to 70 MHz @ 150 MSPS

SFDR = 84 dBc to 70 MHz @ 150 MSPS

Low power: 820 mW @ 150 MSPS

1.8 V analog supply operation

1.8 V to 3.3 V CMOS output supply or 1.8 V LVDS

output supply

Integer 1-to-8 input clock divider

IF sampling frequencies to 450 MHz

Internal ADC voltage reference

Integrated ADC sample-and-hold inputs

Flexible analog input range: 1 V p-p to 2 V p-p

Differential analog inputs with 650 MHz bandwidth

ADC clock duty cycle stabilizer

95 dB channel isolation/crosstalk

Serial port control

User-configurable, built-in self-test (BIST) capability

Energy-saving power-down modes

Integrated receive features

Fast detect/threshold bits

Composite signal monitor

APPLICATIONS

Communications

Diversity radio systems

Multimode digital receivers (3G)

GSM, EDGE, WCDMA,

CDMA2000, WiMAX, TD-SCDMA

I/Q demodulation systems

Smart antenna systems

General-purpose software radios

Broadband data applications