AD9925BBCZ中文資料亞德諾數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

GENERAL DESCRIPTION

The AD9925 is a complete 36 MHz front end solution for digital still camera and other CCD imaging applications. Based on the AD9995 product, the AD9925 includes the analog front end and a fully programmable timing generator (AFETG), combined with a 10-channel vertical driver (V-driver). A Precision Timing core allows adjustment of high speed clocks with approximately 600 ps resolution at 36 MHz operation.

FEATURES

Integrated 10-channel V-driver

Register-compatible with the AD9991 and AD9995

3-field (6-phase) vertical clock support

2 additional vertical outputs for advanced CCDs

Complete on-chip timing generator

Precision Timing core with <600 ps resolution

Correlated double sampler (CDS)

6 dB to 42 dB 10-bit variable gain amplifier (VGA)

12-bit 36 MHz ADC

Black level clamp with variable level control

On-chip 3 V horizontal and RG drivers

2-phase and 4-phase H-clock modes

Electronic and mechanical shutter support

On-chip driver for external crystal

On-chip sync generator with external sync input

8 mm × 8 mm CSPBGA package with 0.65 mm pitch

APPLICATIONS

Digital still cameras

Digital video camcorders

CCD camera modules