Features

? VDSS = 1200 V at Tvj = -55...175°C

? IDDC = 55 A at TC = 25°C

? RDS(on) = 40 mΩ at VGS = 20 V, Tvj = 25°C

? New performance-optimized chip technology (Gen1p) with improved RDSon* A FOM

? Increased recommended turn-on voltage (VGS(on) = 20 V) for lower RDS(on)

? Best in class switching energy for lower switching losses and reduced cooling efforts

? Lowest device capacitances for higher switching speeds and higher power density

? A combination of low Crss/Ciss ratio and high VGS(th) to avoid parasitic turn-on and enable unipolar

gate driving

? Reduced total gate charge QGtot for lower driving power and losses

? .XT die attach technology for best in class thermal performance

? Sense pin for optimized switching performance

? Suitable for HV creepage requirements