AT25HP256集成電路（IC）的存儲(chǔ)器規(guī)格書PDF中文資料

Description

The AT25HP256/512 provides 262,144/524,288 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 32,768/65,536 words of 8-bits each. The device is optimized for use in many industrial and commercial applications where high-speed, low-power, and low-voltage operation are essential. The AT25HP256/512 is available in a space saving 8-lead PDIP (AT25HP256/512), 8-lead EIAJ SOIC (AT25HP256), 16-lead JEDEC SOIC (AT25HP512), 8-lead Leadless Array (AT25HP256/512) package, and 8-lead SOIC Array package (SAP). In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions.

Features

? Serial Peripheral Interface (SPI) Compatible

? Supports SPI Modes 0 (0,0) and 3 (1,1)

? 128-byte Page Mode Only for Write Operations

? Low-voltage and Standard-voltage Operation

– 2.7 (VCC = 2.7V to 5.5V)

– 1.8 (VCC = 1.8V to 5.5V)

? 10 MHz (5V), 5MHz (2.7V) and 2 MHz (1.8V) Clock Rate

? Block Write Protection

? Protect 1/4, 1/2, or Entire Array

? Write Protect (WP) Pin and Write Disable Instructions for

both Hardware and Software Data Protection

? High Reliability

– Endurance: 100K Write Cycles

– Data Retention: >40 Years

? 8-lead PDIP, 8-lead EIAJ SOIC, 16-lead JEDEC SOIC, 8-lead Leadless Array Package,

and 8-lead SOIC Array Package (SAP)

? Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers