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CY2213ZC-2T中文資料賽普拉斯數(shù)據(jù)手冊PDF規(guī)格書
CY2213ZC-2T規(guī)格書詳情
Introduction
The CY2213 has a two-wire serial interface designed for data transfer operations, and is used for programming the P and Q values for frequency generation. Sclk is the serial clock line controlled by the master device. Sdata is a serial bidirectional data line. The CY2213 is a slave device and can either read or write information on the dataline upon request from the master device.
Features
? Jitter peak-peak (TYPICAL) = 35 ps
? LVPECL output
? Default Select option
? Serially-configurable multiply ratios
? Output edge-rate control
? 16-pin TSSOP
? High frequency
? 3.3V operation
Benefits
High-accuracy clock generation
One pair of differential output drivers
Phase-locked loop (PLL) multiplier select
Eight-bit feedback counter and six-bit reference counter for high accuracy
Minimize electromagnetic interference (EMI)
Industry-standard, low-cost package saves on board space
125- to 400-MHz (-1) or to 500-MHz (-2) extended output range for high-speed applications
Enables application compatibility
產(chǎn)品屬性
- 型號：
CY2213ZC-2T
- 制造商：
CYPRESS
- 制造商全稱：
Cypress Semiconductor
- 功能描述：
High-Frequency Programmable PECL Clock Generator
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
CYPRESS |
19+ |
565 |
原裝正品 |
詢價(jià) | |||
CYPRESS/賽普拉斯 |
24+ |
TSBU |
1000 |
原裝現(xiàn)貨假一賠十 |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
22+ |
NA |
50000 |
只做原裝正品,假一罰十,歡迎咨詢 |
詢價(jià) | ||
CYPRESS |
23+ |
原裝正品現(xiàn)貨 |
10000 |
TSSOP16 |
詢價(jià) | ||
CYPRESS |
21+ |
TSBU |
9866 |
詢價(jià) | |||
CYPRESS |
23+ |
TSSOP16 |
260 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
23+ |
NA |
7000 |
詢價(jià) | |||
CYPRESS/賽普拉斯 |
24+ |
NA |
2000 |
原裝現(xiàn)貨 |
詢價(jià) | ||
CYPRESS |
24+ |
SOP |
35200 |
一級代理/放心采購 |
詢價(jià) | ||
CYPRESS/賽普拉斯 |
23+ |
N/A |
98900 |
原廠原裝正品現(xiàn)貨!! |
詢價(jià) |
