零件編號(hào) | 下載&訂購 | 功能描述 | 制造商&上傳企業(yè) | LOGO |
---|---|---|---|---|
CY7C1327G | 4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | |
CY7C1327G | 4-Mbit (256K x 18) Pipelined Sync SRAM | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | |
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress | ||
4-Mbit (256K x 18) Pipelined Sync SRAM Features ?Registeredinputsandoutputsforpipelinedoperation ?256K×18commonI/Oarchitecture ?3.3Vcorepowersupply ?3.3V/2.5VI/Ooperation ?Fastclock-to-outputtimes —2.6ns(for250-MHzdevice) —2.6ns(for225-MHzdevice) —2.8ns(for200-MHzdevice) —3.5 | CypressCypressSemiconductor 賽普拉斯賽普拉斯半導(dǎo)體公司 | Cypress |
詳細(xì)參數(shù)
- 型號(hào):
CY7C1327G
- 功能描述:
靜態(tài)隨機(jī)存取存儲(chǔ)器 256Kx18 3.3V IND Sync FT 靜態(tài)隨機(jī)存取存儲(chǔ)器
- RoHS:
否
- 制造商:
Cypress Semiconductor
- 存儲(chǔ)容量:
16 Mbit
- 組織:
1 M x 16
- 訪問時(shí)間:
55 ns
- 電源電壓-最大:
3.6 V
- 電源電壓-最?。?/span>
2.2 V
- 最大工作電流:
22 uA
- 最大工作溫度:
+ 85 C
- 最小工作溫度:
- 40 C
- 安裝風(fēng)格:
SMD/SMT
- 封裝/箱體:
TSOP-48
- 封裝:
Tray
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
Cypress |
TQFP |
1200 |
Cypress一級(jí)分銷,原裝原盒原包裝! |
詢價(jià) | |||
CYPRESS |
24+ |
106 |
詢價(jià) | ||||
CYRESS |
24+ |
TQFP |
6980 |
原裝現(xiàn)貨,可開13%稅票 |
詢價(jià) | ||
CYP |
23+ |
貼片 |
5000 |
原裝正品,假一罰十 |
詢價(jià) | ||
CYPRESS |
24+ |
100%原裝 |
1500 |
原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
Cypress |
16+ |
原廠封裝 |
10000 |
全新原裝正品,代理優(yōu)勢渠道供應(yīng),歡迎來電咨詢 |
詢價(jià) | ||
CYPRESS |
22+ |
QFP |
2000 |
原裝正品現(xiàn)貨 |
詢價(jià) | ||
CYP |
23+ |
QFP |
8560 |
受權(quán)代理!全新原裝現(xiàn)貨特價(jià)熱賣! |
詢價(jià) | ||
CYPRESS |
23+ |
304 |
專做原裝正品,假一罰百! |
詢價(jià) | |||
CYPRESS |
22+23+ |
QFP |
43810 |
絕對原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) |
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