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CY7C1371D-100BZI

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZI

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXC

18-Mbit(512K?36/1M?18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXI

18-Mbit(512K?36/1M?18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGXI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGXI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

供應(yīng)商型號品牌批號封裝庫存備注價格
CYPRESS
2138+
原廠標準封裝
8960
代理CYPRESS全系列芯片,原裝現(xiàn)貨
 詢價
CYPRESS/賽普拉斯
21+
BGA
9800
只做原裝正品假一賠十!正規(guī)渠道訂貨!
 詢價
Cypress
TQFP
8600
Cypress一級分銷,原裝原盒原包裝!
 詢價
CYRESS
24+
TQFP
6980
原裝現(xiàn)貨,可開13%稅票
 詢價
Cypress
22+
100TQFP (14x20)
9000
原廠渠道,現(xiàn)貨配單
 詢價
Cypress
21+
100TQFP (14x20)
13880
公司只售原裝,支持實單
 詢價
Cypress
23+
100TQFP (14x20)
9000
原裝正品，支持實單
 詢價
CypressSemiconductorCorp
2022
ICSRAM18MBIT133MHZ100LQF
5058
原廠原裝正品,價格超越代理
 詢價
Cypress
23+
100-LQFP
7750
全新原裝優(yōu)勢
 詢價
CYP
23+
貼片
5000
原裝正品,假一罰十
 詢價
更多CY7C1371D-100BZI供應(yīng)商 更新時間2024-11-20 14:38:00

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