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CY7C1371D-100BZXC

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZXC

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXC

18-Mbit(512K?36/1M?18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXI

18-Mbit(512K?36/1M?18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100AXI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGXC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGXI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BGXI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZC

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

CY7C1371D-100BZI

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

賽普拉斯賽普拉斯半導(dǎo)體公司

供應(yīng)商型號(hào)品牌批號(hào)封裝庫(kù)存備注價(jià)格
Cypress
TQFP
8600
Cypress一級(jí)分銷,原裝原盒原包裝!
詢價(jià)
CYRESS
24+
TQFP
6980
原裝現(xiàn)貨,可開(kāi)13%稅票
詢價(jià)
Cypress
22+
100TQFP (14x20)
9000
原廠渠道,現(xiàn)貨配單
詢價(jià)
Cypress
21+
100TQFP (14x20)
13880
公司只售原裝,支持實(shí)單
詢價(jià)
Cypress
23+
100TQFP (14x20)
9000
原裝正品,支持實(shí)單
詢價(jià)
Cypress
23+
100-LQFP
7750
全新原裝優(yōu)勢(shì)
詢價(jià)
CYP
23+
貼片
5000
原裝正品,假一罰十
詢價(jià)
CYP
2339+
N/A
5650
公司原廠原裝現(xiàn)貨假一罰十!特價(jià)出售!強(qiáng)勢(shì)庫(kù)存!
詢價(jià)
CYPRESS
2020+
SOIC-8
4500
百分百原裝正品 真實(shí)公司現(xiàn)貨庫(kù)存 本公司只做原裝 可
詢價(jià)
CYPRESS/賽普拉斯
23+
QFP
90000
一定原裝正品
詢價(jià)
更多CY7C1371D-100BZXC供應(yīng)商 更新時(shí)間2025-1-20 15:15:00