首頁 >H5TC4G83EFR-PBAIC>規(guī)格書列表
| 零件編號(hào) | 下載&訂購 | 功能描述 | 制造商&上傳企業(yè) | LOGO |
|---|---|---|---|---|
4GbDDR3LSDRAM | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAM | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAM | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAM | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAM | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAM | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAM | HynixHynix Semiconductor SK海力士海力士半導(dǎo)體 | Hynix |
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
HYNIX |
23+ |
BGA |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
SKHYNIX |
23+ |
BGA |
35200 |
原廠授權(quán)一級(jí)代理,專業(yè)海外優(yōu)勢訂貨,價(jià)格優(yōu)勢、品種 |
詢價(jià) | ||
SKHYNIX |
2052+ |
BGA |
6542 |
只做原裝正品現(xiàn)貨!或訂貨假一賠十! |
詢價(jià) | ||
SKHYNIX/海力士 |
23+ |
FBGA |
12500 |
全新原裝現(xiàn)貨,假一賠十 |
詢價(jià) | ||
SKHYNIX |
21+ |
BGA |
8000 |
全新原裝 公司現(xiàn)貨 價(jià)格優(yōu) |
詢價(jià) | ||
HYNIX |
2022+ |
BGA |
8000 |
詢價(jià) | |||
SK HYNIX |
22+ |
BGA |
50000 |
只做原裝正品,假一罰十,歡迎咨詢 |
詢價(jià) | ||
BROADCOM |
1901+ |
BGA |
10 |
一級(jí)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) | ||
SKHYNIX |
FBGA |
10 |
一級(jí)代理 原裝正品假一罰十價(jià)格優(yōu)勢長期供貨 |
詢價(jià) | |||
SKHYNIX/海力士 |
23+ |
BGA78 |
1700 |
原現(xiàn)實(shí)單好價(jià)支持 |
詢價(jià) |
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