HC805P18GRS/D中文資料恩智浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書

Features

? Low-cost HC05 core running at 2 MHz bus speed

? 28-pin DIP or SOIC package

? 4 MHz on-chip crystal/ceramic resonator oscillator

? 8064 bytes of user EEPROM including 48 bytes of page zero EEPROM and

16 bytes of user vectors

? 192 bytes of on-chip RAM

? 128 bytes of EEPROM

? Low-voltage reset

? 4-channel, 8-bit A/D converter

? SIOP serial communications port

? COP watchdog timer with active pulldown on RESET

? 16-bit timer with output compare and input capture

? 20 bidirectional I/O lines and one input-only line

? High current sink and source on two I/O pins (PC0 and PC1)