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HD74HCT374FPEL中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書
HD74HCT374FPEL規(guī)格書詳情
Description
These device are positive edge triggered flip-flops. The difference between HD74HCT374 and HD74HCT534 is only that the former is a true outputs and the latter is a false outputs. Data at the D inputs, meeting the setup and hold time requirements, are transferred to the Q outputs on positive going transitions of the clock (CK) input. When a high logic level is applied to the output control (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.
Features
? LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
? High Speed Operation: tpd (Clock to Q) = 15 ns typ (CL = 50 pF)
? High Output Current: Fanout of 15 LSTTL Loads
? Wide Operating Voltage: VCC = 4.5 to 5.5 V
? Low Input Current: 1 μA max
? Low Quiescent Supply Current: ICC (static) = 4 μA max (Ta = 25°C)
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
HITACHI/日立 |
23+ |
NA/ |
290 |
優(yōu)勢代理渠道,原裝正品,可全系列訂貨開增值稅票 |
詢價(jià) | ||
RENESAS |
07+ |
SOP20 |
624 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) | ||
HIT |
2015+ |
DIP20 |
19889 |
一級代理原裝現(xiàn)貨,特價(jià)熱賣! |
詢價(jià) | ||
HIT |
DIP |
68500 |
一級代理 原裝正品假一罰十價(jià)格優(yōu)勢長期供貨 |
詢價(jià) | |||
IDT/RENESAS |
22+ |
NA |
24500 |
瑞薩全系列在售 |
詢價(jià) | ||
HITACHI |
23+ |
SOP7.2 |
7300 |
專注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
HIT |
22+ |
SOP7.2MM |
900 |
全新原裝現(xiàn)貨 |
詢價(jià) | ||
HITACHI/日立 |
01+ |
SOP5.2 |
170 |
原裝現(xiàn)貨支持BOM配單服務(wù) |
詢價(jià) | ||
HITACHI |
21+ |
SOP-20-5.2 |
290 |
原裝現(xiàn)貨假一賠十 |
詢價(jià) | ||
HITACHI |
2016+ |
SOP7.2 |
5562 |
只做進(jìn)口原裝現(xiàn)貨!或訂貨!假一賠十! |
詢價(jià) |