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HD74HCT374FPEL中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書

HD74HCT374FPEL
廠商型號(hào)

HD74HCT374FPEL

功能描述

Octal D-type Flip-Flops (with inverted 3-state outputs)

文件大小

118.13 Kbytes

頁面數(shù)量

8

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-1-27 17:26:00

HD74HCT374FPEL規(guī)格書詳情

Description

These device are positive edge triggered flip-flops. The difference between HD74HCT374 and HD74HCT534 is only that the former is a true outputs and the latter is a false outputs. Data at the D inputs, meeting the setup and hold time requirements, are transferred to the Q outputs on positive going transitions of the clock (CK) input. When a high logic level is applied to the output control (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.

Features

? LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility

? High Speed Operation: tpd (Clock to Q) = 15 ns typ (CL = 50 pF)

? High Output Current: Fanout of 15 LSTTL Loads

? Wide Operating Voltage: VCC = 4.5 to 5.5 V

? Low Input Current: 1 μA max

? Low Quiescent Supply Current: ICC (static) = 4 μA max (Ta = 25°C)

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