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HD74LV4040AFPEL中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

HD74LV4040AFPEL
廠商型號(hào)

HD74LV4040AFPEL

功能描述

12-stage Binary Counter

文件大小

185.88 Kbytes

頁(yè)面數(shù)量

11 頁(yè)

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡(jiǎn)稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

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數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-1-18 23:00:00

HD74LV4040AFPEL規(guī)格書(shū)詳情

Description

The HD74LV4040A is a 12 stage counter. This device is incremented on the falling edge (negative transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset input. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption extends the battery life.

Features

? VCC = 2.0 V to 5.5 V operation

? All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)

? All outputs VO (Max.) = 5.5 V (@VCC = 0 V)

? Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)

? Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)

? Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)

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23+
NA/
4000
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RENESAS
23+
TSOP14
20000
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07PB
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5600
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RENESAS
21+
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4000
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只做原裝
24+
TSOP14
36520
一級(jí)代理/放心采購(gòu)
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RENESAS
23+
NA
2406
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RENESAS
22+23+
TSSOPPB
37656
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589220
16余年資質(zhì) 絕對(duì)原盒原盤(pán) 更多數(shù)量
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RENESAS
06+
TSSOP P/B
4000
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RENESAS
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9988
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