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IC61SF12832-7.5TQ中文資料ICSI數(shù)據(jù)手冊PDF規(guī)格書
| 廠商型號 |
IC61SF12832-7.5TQ |
| 功能描述 | 128K x 32 Flow Through SyncBurst SRAM |
| 文件大小 |
174.26 Kbytes |
| 頁面數(shù)量 |
17 頁 |
| 生產(chǎn)廠商 | Integrated Circuit Solution Inc |
| 企業(yè)簡稱 |
ICSI |
| 中文名稱 | Integrated Circuit Solution Inc官網(wǎng) |
| 原廠標(biāo)識 |  |
| 數(shù)據(jù)手冊 | |
| 更新時間 | 2025-2-25 8:30:00 |
| 人工找貨 | IC61SF12832-7.5TQ價格和庫存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
IC61SF12832-7.5TQ規(guī)格書詳情
DESCRIPTION
The ICSI IC61SF12832 and IC61SF12836 are high-speed synchronous static RAM designed to provide a burstable, high performance for high speed networking and communication applications. It is organized as 131,072 words by 32 bits or 36 bits, fabricated with ICSIs advanced CMOS technology. The device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input.
FEATURES
? Fast access times: 7.5 ns, 8 ns, 8.5 ns, 10 ns, and 12 ns
? Internal self-timed write cycle
? Individual Byte Write Control and Global Write
? Clock controlled, registered address, data inputs and control signals
? PentiumTM or linear burst sequence control using MODE input
? Three chip enables for simple depth expansion and address pipelining
? Common data inputs and data outputs
? 100-Pin TQFP (JEDEC LQFP) and 119-pin PBGA package
? Single +3.3V +10, -5 power supply
? Power-down snooze mode
