ICS85411I中文資料IDT數(shù)據(jù)手冊PDF規(guī)格書
ICS85411I規(guī)格書詳情
GENERAL DESCRIPTION
The ICS85411I is a low skew, high performance 1-to-2 Differential-to-LVDS Fanout Buffer and a member of the HiPerClockS? family of High Performance Clock Solutions from IDT. The CLK, nCLK pair can accept most standard differential input levels.The ICS85411I is characterized to operate from a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the ICS85411I ideal for those clock distribution applications demanding well defined performance and repeatability.
FEATURES
? Two differential LVDS outputs
? One differential CLK, nCLK clock input
? CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
? Maximum output frequency: 650MHz
? Translates any single ended input signal to LVDS levels with resistor bias on nCLK input
? Output skew: 25ps (maximum)
? Part-to-part skew: 300ps (maximum)
? Additive phase jitter, RMS: 0.05ps (typical)
? Propagation delay: 2.5ns (maximum)
? 3.3V operating supply
? -40°C to 85°C ambient operating temperature
? Available in both standard (RoHS 5) and lead free (RoHS 6) packages
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
IDTIntegratedDeviceTechn |
22+23+ |
32-LQFP |
16849 |
絕對原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
IDT |
24+ |
32-LQFP |
484 |
詢價(jià) | |||
ICS854210CYLF |
115 |
115 |
詢價(jià) | ||||
IDT |
21+ |
TSSOP20 |
12588 |
原裝正品,價(jià)格優(yōu)勢 |
詢價(jià) | ||
ICS |
23+ |
TSSOP20 |
5000 |
原裝正品,假一罰十 |
詢價(jià) | ||
ICS |
2020+ |
SOP |
80000 |
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
IDT |
24+ |
LQFP-32 |
7033 |
優(yōu)勢現(xiàn)貨 |
詢價(jià) | ||
IDT |
17+ |
TSSOP20 |
60000 |
保證進(jìn)口原裝可開17%增值稅發(fā)票 |
詢價(jià) | ||
IDT |
三年內(nèi) |
1983 |
只做原裝正品 |
詢價(jià) | |||
INTEGRATE |
24+ |
35200 |
一級(jí)代理/放心采購 |
詢價(jià) |
