IDT54FCT16841ETPV中文資料IDT數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION:

The FCT16841AT/BT/CT/ET and FCT162841AT/BT/CT/ET 20-bit transparent D-type latches are built using advanced dual metal CMOS technology. These high-speed, low-power latches are ideal for temporary storage of data. They can be used for implementing memory address latches, I/O ports, and bus drivers. The Output Enable and Latch Enable controls are organized to operate each device as two 10-bit latches or one 20-bit latch. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.

FEATURES:

? Common features:

– 0.5 MICRON CMOS Technology

– High-speed, low-power CMOS replacement for ABT functions

– Typical tSK(o) (Output Skew) < 250ps

– Low input and output leakage ≤1μA (max.)

– ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

– Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack

– Extended commercial range of -40°C to +85°C

– VCC = 5V ±10

? Features for FCT16841AT/BT/CT/ET:

– High drive outputs (-32mA IOH, 64mA IOL)

– Power off disable outputs permit “l(fā)ive insertion”

– Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C

? Features for FCT162841AT/BT/CT/ET:

– Balanced Output Drivers: ±24mA (commercial), ±16mA (military)

– Reduced system switching noise

– Typical VOLP (Output Ground Bounce)